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Carry Accumulator for Floating Point Operation

IP.com Disclosure Number: IPCOM000052115D
Original Publication Date: 1981-Apr-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 3 page(s) / 52K

Publishing Venue

IBM

Related People

Cannon, JW: AUTHOR [+3]

Abstract

Summary storage of carries is generated while doing Floating Point (FP) multiply operations on 64-bit operands with a 16-bit processor. The arrangement has utility in conjunction with a floating point feature such as that described in the preceding article.

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Carry Accumulator for Floating Point Operation

Summary storage of carries is generated while doing Floating Point (FP) multiply operations on 64-bit operands with a 16-bit processor. The arrangement has utility in conjunction with a floating point feature such as that described in the preceding article.

An important attribute which a processor should possess (if implementing Floating Point Multiply) is to shift an operand (multiplicand) left, then conditionally add the shifted results to an accumulator (product) in as little time as possible. The specific multiples of the multiplicand, which are conditionally added to the product, are based on the value of the multipliers. From a performance standpoint, it is desirable to accomplish the conditional add to product immediately after each individual shift. This also aids in keeping the required number of local store working registers to a minimum, since all shifted variations would require temporary storage.

The value of the multiplier is interrogated on a character by character basis. After each interrogation, the entire 64-bit multiplicand is shifted and added appropriately in 16-bit increments. The table on the next page illustrates the objective of the basic multiply algorithm. Each of the 16 possible variations of a specific multiplier character is illustrated along with a basic description of the individual subroutines. As many as three adds (or subtracts) to product may be required by this algorithm (as illustrated by X7 and X9 subroutines).

A problem is incurred when subsequent adds are made to a partial product accumulator. Every add has the ability to generate a carry out of the Arithmetic and Logic Unit (ALU) of the processor. However, a typical ALU only has the ability to provide for a single carry. The processor design has the ability to accommodate multiple carrys. This is accomplished through the use of a carry accumulator.

The carry accumulator is a 3-bit counter installed logically adjacent to the normal carry indicator. Fig. 1 illustrates the arrangement of the carry accumulator to the related ALU members.

This counter is incremented every time a n...