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Carry Shift for Floating Point Operations

IP.com Disclosure Number: IPCOM000052116D
Original Publication Date: 1981-Apr-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 43K

Publishing Venue

IBM

Related People

Cannon, JW: AUTHOR [+3]

Abstract

Intermediate storage of carries is generated while doing Floating Point (FP) multiply operations on 64-bit operands with a 16-bit processor. The arrangements have utility in conjunction with a floating point feature such as that described on pages 5263-5265.

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Carry Shift for Floating Point Operations

Intermediate storage of carries is generated while doing Floating Point (FP) multiply operations on 64-bit operands with a 16-bit processor. The arrangements have utility in conjunction with a floating point feature such as that described on pages 5263-5265.

An important attribute which a microprocessor should possess (if implementing Floating Point Multiply) is to shift an operand (multiplicand) left, then conditionally add the shifted results to an accumulator (product) in as little time as possible. The specific multiples of the multiplicand which are conditionally added to the product are based on the value of the multipliers. From a performance stand-point, it is desirable to accomplish the conditional add to product immediately after each individual shift. This also aids in keeping the required number of local store working registers to a minimum, since all shifted variations would require temporary storage.

For the above-stated reasons, it is also desirable to completely finish the shifting and adding of a low-order 16-bit multiplicand word before advancing to the next higher order 16-bit word of the 64-bit operand. However, a problem is inherent in the process which shifts left and generates the 2X and 4X operands. The high-order 2 bits of the 16-bit word are lost. Bit "0" is lost when generating the 2X word, and bit "1" is lost when generating the 4X word.

The processor described overcomes this difficulty by appending two additional bits on the 16-bit A register which accomplishes the actual shift. Th...