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Browse Prior Art Database

Optimized Design Of An Integrated MSI Thyristor Crosspont

IP.com Disclosure Number: IPCOM000052193D
Original Publication Date: 1981-May-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 116K

Publishing Venue

IBM

Related People

Benichou, C: AUTHOR [+3]

Abstract

The layout resulting from the integration of 144 thyristor devices is depicted in the above figure. Each device is comprised of a thyristor crosspoint with an additional + diode resistor capacitor cell, such as shown in the IBM Technical Disclosure Bulletin 23, 1961-1962 (October 1980).

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Optimized Design Of An Integrated MSI Thyristor Crosspont

The layout resulting from the integration of 144 thyristor devices is depicted in the above figure. Each device is comprised of a thyristor crosspoint with an additional + diode resistor capacitor cell, such as shown in the IBM Technical Disclosure Bulletin 23, 1961-1962 (October 1980).

The chip layout is divided into two parts, shared by the central marker distribution, which is symmetrical with respect to the center of the chip. Each part includes 9 rows of 8 devices. In one column, devices are clustered by 2 in order to create a convenient marker distribution. It is desirable to use two levels of metallurgy when this design is used. The first level of metal will be devoted to inputs and markers, while the second level of metal assures the connection of the outputs and pads. The above design leads to a highly integrated chip which is easy to wire and has good AC performance.

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