Browse Prior Art Database

Time Delay and Integration Imager in GaAs

IP.com Disclosure Number: IPCOM000052287D
Original Publication Date: 1981-May-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 85K

Publishing Venue

IBM

Related People

Chamberlain, S: AUTHOR [+2]

Abstract

A time delay and integration imager may be made in gallium arsenide (GaAs) using the semi-insulating properties and the optical response of the material. the imager uses vertical illuminated shift registers, horizontal clock electrodes and horizontal readout shift registers in a charge-coupled device configuration.

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Time Delay and Integration Imager in GaAs

A time delay and integration imager may be made in gallium arsenide (GaAs) using the semi-insulating properties and the optical response of the material. the imager uses vertical illuminated shift registers, horizontal clock electrodes and horizontal readout shift registers in a charge-coupled device configuration.

In the device the charge-coupled device channel is defined by an n-region with two n/+/ contacts at the ends. All transfer gates and the input and output gates are "p" regions. The transfer gates form a p-n junction and act as light- collecting sites.

The device can be fabricated in three types of structures, as shown in Figs. 2, 3 and 4.

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