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Browse Prior Art Database

Polysilicon Polysilicon Read Only Memory

IP.com Disclosure Number: IPCOM000052355D
Original Publication Date: 1981-Jun-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Av-Ron, M: AUTHOR [+3]

Abstract

When a capacitor structure that includes an N type polysilicon layer over a silicon dioxide insulator which is, in turn, over a P type polysilicon layer breaks down, a PN junction is formed. The capacitor has then been transformed into a diode. In order to form a read-only memory using such a structure, overlapping perpendicular polysilicon lines 5 and 6 of different doping types are deposited over a silicon substrate 7 with silicon dioxide insulation 8 between the lines and the substrate, as shown in the figure.

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Polysilicon Polysilicon Read Only Memory

When a capacitor structure that includes an N type polysilicon layer over a silicon dioxide insulator which is, in turn, over a P type polysilicon layer breaks down, a PN junction is formed. The capacitor has then been transformed into a diode. In order to form a read-only memory using such a structure, overlapping perpendicular polysilicon lines 5 and 6 of different doping types are deposited over a silicon substrate 7 with silicon dioxide insulation 8 between the lines and the substrate, as shown in the figure.

In order to write a bit, a voltage is placed between an N type and a P type line which is enough to cause a breakdown of the silicon dioxide insulation between the two lines. The breakdown creates a permanent diode, which provides a low resistance path when biased in the forward direction. The density of this read- only memory is governed only by the line width of the polysilicon.

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