Browse Prior Art Database

Roll Mode Error Correction

IP.com Disclosure Number: IPCOM000052393D
Original Publication Date: 1981-Jun-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 5 page(s) / 151K

Publishing Venue

IBM

Related People

Brown, DT: AUTHOR

Abstract

This scheme permits efficient error correction for a device that store data blocks (pages) and accesses them cyclically using roll mode, where a roll-mode operation consists of reading or writing data lines beginning at any line of a block, continuing to the end of the block, and then back to the beginning until all lines are read/written.

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Roll Mode Error Correction

This scheme permits efficient error correction for a device that store data blocks (pages) and accesses them cyclically using roll mode, where a roll-mode operation consists of reading or writing data lines beginning at any line of a block, continuing to the end of the block, and then back to the beginning until all lines are read/written.

Roll mode is useful in a device that stores data in a rotating medium or in electronic shift registers. It allows data transfer to begin at the instant a read or write is requested and so saves, on the average, the time for half a revolution when the data block occupies an entire set of tracks or shift registers.

The scheme has one check bit per line of the block, plus 19 additional check bits forming a cyclic code over the entire block. This is when the block has 512 lines with 8 bytes per line. An independent code per line would require 8 check bits per line of 64 data bits. Thus, the total number of bits in a block (check bits plus data bits) is 36,864 for an independent code per line and 33,299 in this technique, or a decrease of 9.7%.

Encoding Procedure

As shown in Fig. 1, when writing a block onto the device 8, each line of 8 bytes plus a parity bit is entered into the coder 10 as it is written. The coder and the roll-mode counter 12 are shifted after each entry. Writing, which may begin at any line, continues until the last line of the block. At this time the coder 10 and counter 12 receive an extra shift with coder entries set to zeros. Then, writing continues in the same way, starting at the first line of the block until all lines are written.

Next, the coder 10 is shifted 18 more times with the inputs set to zeros. If, after a shift, the roll-mode counter 12 contains a 1 in the position corresponding to the shift, the coder register contents are exclusive ORed into the CRC (cyclic redundancy check) register 14 (position 1 after the first shift, etc.). If the counter 12 has a 1 in position 0, entry is also done before the first shift.

This procedure performs a multiplication by X/1+1/ as described in the theory section. The final CRC contents are stored in the CRC array, and the coder register is reset to zeros.

Decoding Procedure

When reading a block from the device 8, each line is again entered into the coder 10. Parity is checked, and if there is a parity error, a 1 is entered into the error pattern register 16. The coder 10, error pattern register 16, and roll-mode counter 12 are all shifted after every coder entry. After the last line is read and entered, the CRC word from the CRC array 18 is entered into the coder. Parity of the CRC word is checked, and a 1 is entered into the error pattern register 16 if parity is odd. The coder 10, error pattern register 16, and roll-mode counter 12 are shifted, and then reading continues with the first line of the block. After all

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lines are read and 18 additional shifts are performed as when writing, the...