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Device Identification by Test Signal Duration

IP.com Disclosure Number: IPCOM000052403D
Original Publication Date: 1981-Jun-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Paska, TM: AUTHOR

Abstract

In the design of a universal attachment card to handle the interfacing of a variety of external devices to a data-processing unit, selection of the appropriate operating code requires an identification of the type of device that is actually attached. A classical approach to this problem is to define a unique cable connector pin (which is usually grounded) to represent each device type. If a large number of attaching devices are anticipated, then an equally large number of connector pins must be uniquely assigned and dedicated.

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Device Identification by Test Signal Duration

In the design of a universal attachment card to handle the interfacing of a variety of external devices to a data-processing unit, selection of the appropriate operating code requires an identification of the type of device that is actually attached. A classical approach to this problem is to define a unique cable connector pin (which is usually grounded) to represent each device type. If a large number of attaching devices are anticipated, then an equally large number of connector pins must be uniquely assigned and dedicated.

The identification method presented here requires only one connector pin assignment and a resistor in the attaching cable connector.

The attachment card 10 has a single-shot 11 which is triggered by a program which then monitors VS to determine the time duration of its output. The time duration of the cycle is a function of the value of capacitor C and the effective resistance between card pins 12. When no external device cable is attached, the effective resistance is RO, located on card 10 itself. The capacitor voltage VC then falls slowly, and VS has a long duration TO.

When a first device 13 is attached to card 10, pins 12 are bridged by a resistor R1, which can be physically located in a cable connector or on a card with device 13. In this case, VC falls faster and the duration T1 of VS is shorter. When a different device 14 is attached instead, pins 12 are bridged by a smaller resistor R2,...