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Self Gating and Used as Long Line Receiver

IP.com Disclosure Number: IPCOM000052412D
Original Publication Date: 1981-Jun-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Jones, HC: AUTHOR [+2]

Abstract

In Josephson current injection logic, a self-gating AND (SGA) circuit is used as a long-line receiver for line delays longer than the power supply transition time.

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Self Gating and Used as Long Line Receiver

In Josephson current injection logic, a self-gating AND (SGA) circuit is used as a long-line receiver for line delays longer than the power supply transition time.

Long lines from chip to chip are usually provided with a special receiver which, in many applications, is followed by a data latch and an SGA circuit. The data latch holds true data stored in a superconducting loop, which data are sensed by the SGA in a following duty cycle and put out in dual rail mode as true and complement signals. Omitting the data latch saves considerably on chip area, logic circuits, and delay.

The long line is connected directly to the SGA circuit for controlling the interferometer elements 1 and 2. These are cross-coupled with elements 3 and 4, in which element 3 may be a single junction element. The power input is a periodic ramp voltage or an AC power supply. Injection elements 5 and 6 are coupled to interferometers 2 and 4, respectively, to provide a signal output as a true value T or a complement value C.

The storing effect of a long line as a delay line is intentionally utilized as a substitute for the omitted data latch for transferring information into the next cycle. In addition to the time saved by omitting the receiver and the latch, there is an extension of the duty cycle, i.e,. the usable duty cycle does not end when the power waveform starts falling but rather when it reaches zero.

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