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Browse Prior Art Database

Two Input Digital to Analog Converter

IP.com Disclosure Number: IPCOM000052425D
Original Publication Date: 1981-Jun-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Evans, PJ: AUTHOR

Abstract

This article describes a digital to analog (D/A) converter which will accept two inputs, which may be the digital start and finish values of either X or Y coordinates of a vector to be drawn on a directed beam display tube. The D/A converter is made on a single slice and is illustrated in the diagram.

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Two Input Digital to Analog Converter

This article describes a digital to analog (D/A) converter which will accept two inputs, which may be the digital start and finish values of either X or Y coordinates of a vector to be drawn on a directed beam display tube. The D/A converter is made on a single slice and is illustrated in the diagram.

The operation of the circuit is as follows:

First, consider the circuit operation with the ramp input at ground. Control Amp 'B' then biases its reference transistor such that no collector current flows in RY connected to its reference input. Under these conditions, all the bipolar transistors on the 'B' side are biased off, since they are manufactured on the same slice as the reference transistor. In the meantime, Control Amp 'A' biases its reference transistor such that the collector current flowing in RY connected to its +ve input just causes sufficient voltage drop in RY to cause the +ve input to balance the -ve input at ground potential. The reference transistor is then drawing a precisely controlled collector current, which in turn causes precisely controlled collector currents to be drawn to flow in all the other bipolar transistors on the 'A' side. Thus, the current output of the D/A is controlled entirely from the 'A' digital input.

Now consider the operation with the ramp input at the same [ve voltage as the reference input. The situation is now reversed, with the Control Amp 'B' biasing its reference transistor, and a...