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High Speed Data Compression of Electrocardiograms Using a Microcomputer and Logic

IP.com Disclosure Number: IPCOM000052479D
Original Publication Date: 1981-Jun-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 5 page(s) / 161K

Publishing Venue

IBM

Related People

Coker, CW: AUTHOR

Abstract

This article relates generally to the processing of electrocardiograms (EKCs) and more particularly to a method and apparatus for analyzing 24-hour Holter tapes for abnormal heartbeats. A speed improvement in data compression of the EKG signal can be obtained by using one or two microcomputers in combination with logic. Basically, the microprocessor is used for arithmetic computations.

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High Speed Data Compression of Electrocardiograms Using a Microcomputer and Logic

This article relates generally to the processing of electrocardiograms (EKCs) and more particularly to a method and apparatus for analyzing 24-hour Holter tapes for abnormal heartbeats. A speed improvement in data compression of the EKG signal can be obtained by using one or two microcomputers in combination with logic. Basically, the microprocessor is used for arithmetic computations.

In the prior art, a data compression algorithm computes specific binary valued parameters from an EKG signal at each sample point and then tests these parameters against a selection criterion to determine if the point is to be selected.

This article shows how to obtain up to a 50% improvement in data compression speed. By offloading the selection criterion decision making from the microprocessor, a speed improvement is achieved. Approximately 47 microprocessor instructions out of a total of 162 must be executed for the point selection logic. By using logic gates driven by the computed binary parameters, the point selection decision is made essentially in zero time. For example, if a programmed logic array is used, then the point selection decision can be made in one clock cycle or 1 microsecond for a 1 megahertz clock.

Another advantage of offloading the point selection logic is that a slower speed microprocessor can be used to satisfy a given application.

Fig. 1 shows a block diagram of a data compression system using a microcomputer (Mu) and Point Selection Logic (PSL).

Fig. 2 shows functions performed within the system.

Microcomputer Functions

The microcomputer computes four binary parameters for each of the two EKG signal channels and four slope zone binary parameters. A slope change greater than a specific value is also determined. These 13 computed binary parameters are inputted to the PSL and registers to perform the point selection function.

Point Selection Circuitry Description (Fig. 2) 1. Timer

When a point is selected, the Timer is reset to zero. The Timer circuitry indicates when the time since the last point selection is greater than 30 or 40 milliseconds. These two conditions are inputted to the Point Selection Logic. 2. Zone Registers The previous zones and the zones at the time of the previous selected point are saved in eight registers and inputted to the Point Selection Logic.

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3. Point Selection Logic

This consists of logic gates and state latches. The 13 computed parameters, 2 timer conditions and 8 zone values are inputted to the Point Selection Logic circuit...