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Browse Prior Art Database

High Speed Binary Adder

IP.com Disclosure Number: IPCOM000052531D
Original Publication Date: 1981-Jun-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 3 page(s) / 16K

Publishing Venue

IBM

Related People

Ling, HC: AUTHOR

Abstract

Based on the bit pair (a(i)b(i) truth table, the carry propagate, p(i) carry generate, g(i), have dominated the carry look-ahead formation process for more than two decades. A new scheme is disclosed where the carry propagation is discussed and examined by including the neighboring pairs (a(i), b(i), a(i+1)). The disclosed algorithm not only reduces the component count in design, but also requires fewer logic levels in adder implementation. In addition, the algorithm offers uniform loading in fan-in and fan-out nesting.

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High Speed Binary Adder

Based on the bit pair (a(i)b(i) truth table, the carry propagate, p(i) carry generate, g(i), have dominated the carry look-ahead formation process for more than two decades. A new scheme is disclosed where the carry propagation is discussed and examined by including the neighboring pairs (a(i), b(i), a(i+1)). The disclosed algorithm not only reduces the component count in design, but also requires fewer logic levels in adder implementation. In addition, the algorithm offers uniform loading in fan-in and fan-out nesting.

The traditional recursive formula for carry propagation has dominated the carry handling process in the computer industry for more than two decades. Today, adder designs based on a similar technique include, for example, the IBM System/360 Model 168 and IBM 3033. The recursive formulation of carry is based on the bit pair (a(i)b(i)) truth table. By examining the local bit pair, carry propagate p(i) and carry generate g(i) are formed. The high-order carries are generated by nesting the p(i)s and g(i)'s together. By considering the adjacent bit pairs (a(i) b(i), a(i+1), b(i+1))a new recursive formula is obtained for carry propagation. The comparison between this new scheme and the existing scheme will be discussed.

THE FORMATION OF CARRY AND SUM: Consider adding two binary numbers, A and B, together where A = a(0)2/n/ + a(1)2/n-1/ + a(2)2/n-2/ + ... + a(i)2/n-1/ + ... + a(n)2/0/ B = b(0)2/n/ + b(1)2/n-1/ + b(2)2/n-2/ + ... + b(i)2/n-i/ +
... + b(n)2/0/

The relation among carry H(i), H(i+1) and the neighboring bit pairs (a(i), b(i), a(i+1), b(i+1)) expressed as in Table I, where H(i) is the complementary signal which is generated by a(i), b(i), or transmitted through the low-order bits, i + 1, i + 2, ..., with the transmitting enable switch 0N. This signal can only be terminated when the inhibitor is ON (a(i+1) + b(i+1) = 0). See original page 496. See original page 497. See original page 498. See original page 499.

A set of recursive formulae for both carry H(i) and sum S(i) is thus obtained. They are different from the conventional process. Before showing the difference, the carry look-ahead process must first be examined. See original page 499.

The subscript IL of H(16IL) represents the fact that H(16IL) can be implemented with one level of logic. Based on current switching technology, both fan-in and fan-out are equal to four with eight-emitter dotting; H(16) can be implemented with two levels of logic. See original page 500. See original page 501

Equation 22 contains eight terms, whereas Equation 23 contains fifteen terms. With current available technology, the former can be implemented with one level of logic (shown in detail in the following section); the latter can only be implemented with two levels of logic. It is also necessary to examine the ith digit carry formation.

For Equation 2, the carry is generated by local complementing signal K(i), and the remote carry H(i+1) is controlled...