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Automatic RAM Macro Design System

IP.com Disclosure Number: IPCOM000052743D
Original Publication Date: 1981-Jul-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Balasubramanian, PS: AUTHOR [+2]

Abstract

The principles of a computer-assisted design program are disclosed for a random-access memory (RAM). The program aids in the design of a RAM which has optimized X and Y dimensions for improved performance and chip area utilization. The X dimension in mils is given by the relation X equals N word length, where N is an integer. Word length is the number of bits in the word size selected for storage in the memory. The Y dimension is given by the relation Y equals the number of words stored in the memory N. The X and Y dimensions are in orthogonal relation. The X dimension is divided into a plurality of diffusion lines in the Y direction, one for each bit in the word length, disposed on the surface of the semiconductor chip.

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Automatic RAM Macro Design System

The principles of a computer-assisted design program are disclosed for a random-access memory (RAM). The program aids in the design of a RAM which has optimized X and Y dimensions for improved performance and chip area utilization. The X dimension in mils is given by the relation X equals N word length, where N is an integer. Word length is the number of bits in the word size selected for storage in the memory. The Y dimension is given by the relation Y equals the number of words stored in the memory N. The X and Y dimensions are in orthogonal relation. The X dimension is divided into a plurality of diffusion lines in the Y direction, one for each bit in the word length, disposed on the surface of the semiconductor chip. The Y dimension is divided into a plurality of parallel metal rails, one for each row of words stored in the memory formed in the semiconductor chip. The access time performance or P for the memory in nanoseconds is given by the relation K(1)Y/3/ + K(2)Y/2/ + K(3)Y + K(4) where the constants K1...KN are empirically determined from electrical models of the memory. The performance P of the most remote cell is a function of the array dimensions X and Y.

The principles of the program are as follows. The RAM circuitry is divided into 10 different blocks plus wiring as shown in Fig. 1. 1. ARRAY 2. WORD DRIVER 3. BIT DRIVER 4. Restore 5. Pull-Down Latch 6. Output Section 7. True/Complement Driver for Word Decode 8. True/Complement Driver for Bit Decode 9. Word Decode 10. Bit Decode

The individual blocks are designed and plac...