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RAM Tester Calibration Check

IP.com Disclosure Number: IPCOM000052753D
Original Publication Date: 1981-Jul-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Hwang, T: AUTHOR

Abstract

In any testing process, in order to obtain a meaningful measurement, it is critical to make sure that the tester itself is calibrated properly. For a fast operation device under test (DUT), such as a 16K dynamic RAM (random-access memory), the timing of the interfacing signal to the DUT from the tester is crucial. A marginal setup could give an intermediate working situation that misleads one to think the calibration has been properly done; hence, many hours of testing may be invested before the error in calibration is detected. A simple, fast method to check the tuned circuit in the tester utilizes a known good test reference module and test patterns that are selected to produce a predetermined number of error indications.

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RAM Tester Calibration Check

In any testing process, in order to obtain a meaningful measurement, it is critical to make sure that the tester itself is calibrated properly. For a fast operation device under test (DUT), such as a 16K dynamic RAM (random-access memory), the timing of the interfacing signal to the DUT from the tester is crucial. A marginal setup could give an intermediate working situation that misleads one to think the calibration has been properly done; hence, many hours of testing may be invested before the error in calibration is detected. A simple, fast method to check the tuned circuit in the tester utilizes a known good test reference module and test patterns that are selected to produce a predetermined number of error indications.

The method is as follows:. 1. Select a known good module as a test reference module. 2. Initialize the reference by writing ""0'' to all cells. 3. Read and test each cell against a known test pattern, such as a checkerboard. For each cell that shows a mismatch, count the ""error'' and write the correct test pattern for that address into the cell. If the cell compares satisfactorily, proceed to the next cell without writing or counting. 4. When the test marches through the whole chip once, the chip should contain the same pattern as the test pattern. The error count should be exactly the same as the number of cells expected to be detected as errors. (In the case of the checkerboard, the number of expected errors is...