Browse Prior Art Database

Storage Protect Operations

IP.com Disclosure Number: IPCOM000052852D
Original Publication Date: 1981-Jul-01
Included in the Prior Art Database: 2005-Feb-11
Document File: 3 page(s) / 59K

Publishing Venue

IBM

Related People

Cannon, JW: AUTHOR [+3]

Abstract

A single storage array is multiplexed between two different functions. U.S. Patent 4,038,645 describes a previous implementation of a storage protect feature which requires a dedicated memory array. The array's sole function is to store the various storage keys and ""read-only'' flags for the storage protect operations. U.S. Patents 4,037,215 and 4,050,094 describe a similar system with a relocation translator feature that enables rapid accessing of selected addressable blocks in a main memory.

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Storage Protect Operations

A single storage array is multiplexed between two different functions. U.S. Patent 4,038,645 describes a previous implementation of a storage protect feature which requires a dedicated memory array. The array's sole function is to store the various storage keys and ""read-only'' flags for the storage protect operations. U.S. Patents 4,037,215 and 4,050,094 describe a similar system with a relocation translator feature that enables rapid accessing of selected addressable blocks in a main memory.

In the system described here, a single array accommodates the storage protect function and relocation translator requirements under control of hardware shown in Fig. 1. Storage protect operations are mutually exclusive with the relocation translator operations. Both cannot be on simultaneously, but both can be off simultaneously.

The functions of the two mechanisms are sufficiently similar to allow mutual usage of a large portion of the hardware. Both modes of operation require usage of a high speed array. The Active Address Key (AAK) defines the storage which may be accessed at any point in time. Both mechanisms perform read-only validation of the storage access, and both generate protect checks if a read-only violation is detected. However, the use of the storage keys is ignored by the relocation translator hardware.

When the storage protect feature is off and the relocation translator is enabled, the translator's data resides throughout the high speed segmentation register array described in the patents. The storage protect data resides in local store. Four storage keys and four related read-only flags are stored in a single local store word.

Consequently, eight local store words are reserved for temporary storage of the 32 storage protect keys.

When the storage protect feature is on and the relocation translator is disabled, the storage protect keys are stored in only a portion of the segmentation register array (Fig. 2). The segmentation register is 256 x 18 bits. Storage protect requires only a 32 x 4 array. During storage protect mode, all segmentation register addresses are directed to Stack 0 or segmentation register address 0 through 31 (Fig. 2). In storage protect mode, segmentation register bits 12, 13 and 15 that reside in stack 0 words are reserved for storage keys. Bit 14 of the segmentation register word is reserved for the read-only flag. Both the storage protect mechanism and relocation translator use bit 14 to store their respective read-only flags.

When the storage protect feature is initially enabled, the relocation translator mechanis...