Browse Prior Art Database

Storage Key Exception Control

IP.com Disclosure Number: IPCOM000052945D
Original Publication Date: 1981-Aug-01
Included in the Prior Art Database: 2005-Feb-12
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Butwell, JR: AUTHOR

Abstract

This article describes a special control for the execution of the instructions INSERT STORAGE KEY (ISK), RESET REFERENCE BIT (RRB), and SET STORAGE KEY (SSK) to prevent an operating system designated and implemented for 2KB storage-key-block size from executing incorrectly on a CPU which is implemented for a 4KB storage-key-block size.

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Storage Key Exception Control

This article describes a special control for the execution of the instructions INSERT STORAGE KEY (ISK), RESET REFERENCE BIT (RRB), and SET STORAGE KEY (SSK) to prevent an operating system designated and implemented for 2KB storage-key-block size from executing incorrectly on a CPU which is implemented for a 4KB storage-key-block size.

The special control is implemented by a special control bit which is provided in a CR (control register) (e.g., bit 7 in CR0) and is defined as a storage-key- exception-control bit. In a system having a single storage protect key associated with each 4KB block, this CR bit is one to allow the execution of the instructions ISK, RRB and SSK. When this CR bit is zero, and double storage keys are associated with the 4KB blocks, a special operation exception is recognized, and the operations are suppressed.

This special bit supports a class of operating systems (i.e., Multiple Virtual Storage) which sets 2KB storage keys for both halves of a 4KB block to identical keys. Such an operating system can set the storage-key-exception-control bit to one and thus allow correct execution on a CPU which contains a single key for each 4KB storage block.

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