Browse Prior Art Database

Large System Performance Monitor

IP.com Disclosure Number: IPCOM000052953D
Original Publication Date: 1981-Aug-01
Included in the Prior Art Database: 2005-Feb-12
Document File: 4 page(s) / 82K

Publishing Venue

IBM

Related People

Allen, DE: AUTHOR [+8]

Abstract

The evolution of large high speed data processing systems created system performance problems that were difficult to solve because of a lack of the necessary tools with which to gather the required data needed to understand the problem. The high cost of these systems also created a need to monitor the activities of the system resources in order to determine their utilization. In many situations it became necessary to better understand the statistical interaction between the hardware and software during data processing operations before performance problems could be addressed. Monitoring capability was also required to detect and identify design problems and to verify system performance projections without interfering, degrading or affecting the system under surveillance.

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Large System Performance Monitor

The evolution of large high speed data processing systems created system performance problems that were difficult to solve because of a lack of the necessary tools with which to gather the required data needed to understand the problem. The high cost of these systems also created a need to monitor the activities of the system resources in order to determine their utilization. In many situations it became necessary to better understand the statistical interaction between the hardware and software during data processing operations before performance problems could be addressed. Monitoring capability was also required to detect and identify design problems and to verify system performance projections without interfering, degrading or affecting the system under surveillance. A large system performance monitor (LSPM) to perform these functions is described in the following paragraphs.

The system configuration in Fig. 1 shows the LSPM in its typical environment. LSPM is led by a control processor comprising an IBM System/370 data processing system which communicates with the LSPM via the channel interface on which the LSPM appears like an I/O control unit to the control processor's CPU. The host processor is the system under test, and it contains a measurement output tailgate which is connected via cable to an LSPM input tailgate. Probe capability is provided for key points in the host processor not contained in the host tailgate. The control processor CPU selects each feature to be used in the measurement run and personalizes these features to perform specific functions. As a result, a subset of the host outputs are actively monitored and, upon the occurrence of specified events in the host, cause corresponding binary counters in the LSPM to time or count the event. The counters are dynamically enabled and disabled by the host during the measurement run via LSPM internal controls which also are personalized to detect certain events. The values accumulating in the LSPM counters may be sampled at any time by the control processor, which also may record them on I/0, and/or process the accumulated data.

The LSPM is organized as shown in Fig. 2. It contains four identical quadrants Q1 through Q4 with a common interface 10 with the host and a common control interface 11 with the control processor. The interface control 10 accepts the host outputs and conditions and distributes them as inputs to the four quadrants. Under direction of the control CPU, the common control is placed in personalization mode. The features in any quadrant are then personalized by an associated quadrant control (QC) loading personalization data into memories and registers located in the feature. The common control 10 is also personalized to allow dynamic control from the host. The LSPM is then placed in surveillance mode, whereby the host inputs are monitored for the occurrence of specific events which in turn cause corresponding coun...