Browse Prior Art Database

Non Overlapping Clock Generator

IP.com Disclosure Number: IPCOM000053050D
Original Publication Date: 1981-Aug-01
Included in the Prior Art Database: 2005-Feb-12
Document File: 2 page(s) / 58K

Publishing Venue

IBM

Related People

Cases, M: AUTHOR [+3]

Abstract

A circuit is described for generating a set of non-overlapping clock signals with the capability of gating and/or selecting input clock signals. This implementation has the added features of relative low power dissipation and high performance for a given set of capacitive loadings.

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Non Overlapping Clock Generator

A circuit is described for generating a set of non-overlapping clock signals with the capability of gating and/or selecting input clock signals. This implementation has the added features of relative low power dissipation and high performance for a given set of capacitive loadings.

The circuit schematic of a particular application of this design is shown in Fig.
1. A diagram describing the logical operation of this circuit is shown in Fig. 2. The output clock 1 is the true replica of the input clock 1 inhibited by gate 1, and the output clock 2 is either the complement of the input clock 1 or the true representation of the input clock 2 selected by either select 1 or select 2, respectively.

Referring to Fig. 1, transistors T1-T2 and T9-T10 provide the signal inversion of input clock 1 and input clock 2, respectively. These signals are required for proper operation of the push-pull output drivers T3-T4 and T11-T12. Devices T17-T18 provide the required inversion of the gate 1 signal. Device T16 provides a discharge path for node 1 when the input clock 1 signal is inhibited by the gate 1 signal. The transfer gate device T15 provides the logical ANDing of the input clock 1 and the complement of the gate 1 signal. The aforementioned section of the circuit shown in Fig. 1 provides a low power, high performance inhibiting of the input clock 1 signal.

Fig. 3 shows an alternate input circuit for the gating of the input clock 1 signal. Boot-...