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Printed Circuit Card Design

IP.com Disclosure Number: IPCOM000053077D
Original Publication Date: 1981-Aug-01
Included in the Prior Art Database: 2005-Feb-12
Document File: 2 page(s) / 72K

Publishing Venue

IBM

Related People

Jones, NG: AUTHOR [+3]

Abstract

In current printed circuit card technology, the card includes a plurality of power planes and signal planes. Plated through holes (PTHs) are provided which extend from front to back and which receive pins or leads from components, such as circuit modules. Additional plated through holes are provided which extend from front to back and which serve as vias for wire routing, engineering changes (ECs) and as holes for internal test probing (ITP). A large number of holes are empty and unused in the total standard matrix. As a result, valuable card real estate is taken up which limits the signal plane wiring capability and capacity.

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Printed Circuit Card Design

In current printed circuit card technology, the card includes a plurality of power planes and signal planes. Plated through holes (PTHs) are provided which extend from front to back and which receive pins or leads from components, such as circuit modules.

Additional plated through holes are provided which extend from front to back and which serve as vias for wire routing, engineering changes (ECs) and as holes for internal test probing (ITP). A large number of holes are empty and unused in the total standard matrix. As a result, valuable card real estate is taken up which limits the signal plane wiring capability and capacity.

The present design proposes the use of program vias (P-VIA) at standard hole locations in place of most PTH-vias and unused PTHs as signal plane pairs which will increase the card wirability approximately from 22% to 40% depending on the size of the modules being used. As shown in the cross-sectional view, the program vias are not deep but are plated holes arranged on both sides of the card opposite each other and which connect internal signal planes to external signal planes. Since the program vias are not commoned between the front and back of the card, wirability is greatly increased. In the plan view, the internal plane wiring is shown by dotted lines and the external plane wiring by solid lines. Wires would be attached to the external net end point lands after line delete to add or change circuits in both th...