Browse Prior Art Database

PLA Logic Reduction Technique

IP.com Disclosure Number: IPCOM000053139D
Original Publication Date: 1981-Sep-01
Included in the Prior Art Database: 2005-Feb-12
Document File: 5 page(s) / 105K

Publishing Venue

IBM

Related People

Love, RD: AUTHOR [+2]

Abstract

The programmed logic array (PLA) is well established in the prior art, and its principles are described, for example, in U.S. Patent 3,593,317. To make more efficient use of PLA integrated circuit chip areas, a PLA logic reduction technique is disclosed which makes use of several elementary logic reduction principles that result in a significant savings in the number of product terms required to implement a particular complex logic function. The technique has been automated for computer-assisted PLA design applications.

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PLA Logic Reduction Technique

The programmed logic array (PLA) is well established in the prior art, and its principles are described, for example, in U.S.

Patent 3,593,317. To make more efficient use of PLA integrated circuit chip areas, a PLA logic reduction technique is disclosed which makes use of several elementary logic reduction principles that result in a significant savings in the number of product terms required to implement a particular complex logic function. The technique has been automated for computer-assisted PLA design applications.

For definitional purposes, the operation of various logic functions on two binary input variables A and B when arranged in a two-bit/ partitioned array AB, AB, AB and A B can be represented by the letters P, N, I, O, E and U, as is shown in the table below. The output of each search array product term may be applied through an OR array to an output latch having a set (S) and a reset (R) terminal which will toggle (T) the latch when both terminals are activated.

The elementary logic reduction steps are as follows: 1. If the inputs are identical, then combine the outputs of the two product terms and remove one term. Refer to Fig. 1 for an illustration of this principle, where the symbols on the left side represent the search array portion of two product terms and the symbols on the right side represent the outputs of the OR array into which the two search array terms are input. 2. If the inputs differ in only one place and the outputs are identical, then change that input position to a "don't care' status and remove one term. It the outputs are not identical, but one is contained within the other, then make its input position a "don't care" status and remove the duplicate outputs from the other product terms. Refer to Fig. 2 for an illustration of this principle.
3. If one term subsumes another, and the outputs a...