Browse Prior Art Database

Programming Function ID CPU Command

IP.com Disclosure Number: IPCOM000053165D
Original Publication Date: 1981-Sep-01
Included in the Prior Art Database: 2005-Feb-12
Document File: 2 page(s) / 67K

Publishing Venue

IBM

Related People

Fierst, TF: AUTHOR [+4]

Abstract

In the past, computer maintenance concentrated on single, solid hardware failures. An error was recreated, identified, and the fault which led to the error was corrected. This approach does not lend itself well to the handling of software-related failures because the techniques used to recreate hardware errors involve different programs, thereby altering the conditions under which the original error occurred. The following computer instruction allows programs to create on/off status bits to show what function the program is executing and to create a trace of the program functions.

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Programming Function ID CPU Command

In the past, computer maintenance concentrated on single, solid hardware failures. An error was recreated, identified, and the fault which led to the error was corrected. This approach does not lend itself well to the handling of software-related failures because the techniques used to recreate hardware errors involve different programs, thereby altering the conditions under which the original error occurred. The following computer instruction allows programs to create on/off status bits to show what function the program is executing and to create a trace of the program functions.

The format of the program function identification instruction is shown in Fig. A, which sets forth the significance of each bit in the instruction. The function ID shown at the bottom of Fig. A represents the particular program function or program module which is to be identified. This will normally be the next successive address following the instruction.

The instruction is executed by that portion of the system hardware shown in Fig. B.

The program function ID will be picked up and stored into the function ID store buffer from either the LSR stack (work registers) or the storage location following the function ID instruction. The CPU is told where to pick up the function ID from bit "D" of the instruction (Fig. A). If the LSR stack is selected, the program must have previously stored a function ID in the stack prior to executing the new instruction....