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Monolayer Sn Technique for Solving the Substrate Film Interface High Resistance Problem in Molecular Beam Epitaxy

IP.com Disclosure Number: IPCOM000053197D
Original Publication Date: 1981-Sep-01
Included in the Prior Art Database: 2005-Feb-12
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Chang, CA: AUTHOR [+3]

Abstract

Gallium arsenide (GaAs) devices that contain layers grown by molecular beam epitaxy (MBE) exhibit a non-linear voltage current (IV) characteristic high-resistance interface with the substrate when sputter anneal cleaning of the substrate is employed prior to growth of an N/+/ GaAs layer.

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Monolayer Sn Technique for Solving the Substrate Film Interface High Resistance Problem in Molecular Beam Epitaxy

Gallium arsenide (GaAs) devices that contain layers grown by molecular beam epitaxy (MBE) exhibit a non-linear voltage current (IV) characteristic high- resistance interface with the substrate when sputter anneal cleaning of the substrate is employed prior to growth of an N/+/ GaAs layer.

The use of a monolayer of tin (Sn) deposited on the GaAs substrate prior to the molecular beam epitaxial growth of an n/+/ GaAs layer saturates both the high-resistance layer and the grown n/+/ epitaxial GaAs layer, resulting in an electron concentration in the GaAs layer of ~ 10/19//cm/3/, a resistance of 10 ohms and an ohmic IV characteristic for a mesa structure of 100 mu m/2/.

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