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Emulated Cycle Steal Optimization in Inbound Operations

IP.com Disclosure Number: IPCOM000059599D
Original Publication Date: 1986-Jan-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Laurent, B: AUTHOR [+2]

Abstract

This article describes the use of some internal commands which, by a different sequencing, improve performance of cycle steal (inbound) operations between a PROCESSOR and an ADAPTER. As shown in Fig. 1, the PROCESSOR and ADAPTER are linked together by an EXTERNAL BUS on which are exchanged data (halfwords or bytes - last transfer only). Exchanges on the EXTERNAL BUS are controlled by tags: - TD = data request (controlled by PROCESSOR) - VH = data ready (controlled by ADAPTER - current halfword) - EOC = data ready (controlled by ADAPTER - last halfword) - VB+M = data ready (controlled by ADAPTER - last byte) A hand-shaking protocol is used between TD and VH, EOC or VB+M. The PROCESSOR is organized around three hardware entities: processing unit, storage adapter and external bus adapter.

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Emulated Cycle Steal Optimization in Inbound Operations

This article describes the use of some internal commands which, by a different sequencing, improve performance of cycle steal (inbound) operations between a PROCESSOR and an ADAPTER. As shown in Fig. 1, the PROCESSOR and ADAPTER are linked together by an EXTERNAL BUS on which are exchanged data (halfwords or bytes - last transfer only). Exchanges on the EXTERNAL BUS are controlled by tags: - TD = data request (controlled by PROCESSOR) - VH = data ready (controlled by ADAPTER - current halfword) - EOC = data ready (controlled by ADAPTER - last halfword) - VB+M = data ready (controlled by ADAPTER - last byte) A hand-shaking protocol is used between TD and VH, EOC or VB+M. The PROCESSOR is organized around three hardware entities: processing unit, storage adapter and external bus adapter. They are linked together through an INTERNAL BUS. They exchange information through commands which are sent on the INTERNAL BUS. The processing unit (PU) executes internal commands and sends commands to the storage adapter and to the external bus adapter. The internal commands are the following: SKIP : execute the command after the next one IDLE : do nothing AP2 : increment storage address by 2 AM2 : decrement storage address by 2 SWBX : modify data The commands sent to the storage adapter are the following: SMSW : start storage write halfword WSDR : write storage data register SMSR : start storage read halfword SCTL : free st...