Browse Prior Art Database

Cartridge Latch Mechanism

IP.com Disclosure Number: IPCOM000059661D
Original Publication Date: 1986-Jan-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Dials, EN: AUTHOR [+2]

Abstract

A ROS/RAM (read-only storage/random-access memory) cartridge is inserted into an active machine without causing the machine to lock up or to clear storage. An interlock switch is activated prior to the cartridge, making electrical contact with a bus to trigger a bus interlock algorithm. When the cartridge is fully inserted, it is latched, and the interlock switch is opened. A cartridge 1 (Fig. 1) is inserted into a cavity 2 of a housing 3 by the cartridge 1 opening a spring-loaded door 4. The door 4 is resiliently urged to its closed position about its pivot 5. When the cartridge 1 is partially inserted into the cavity 2 of the housing 3, as shown in Fig.

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Cartridge Latch Mechanism

A ROS/RAM (read-only storage/random-access memory) cartridge is inserted into an active machine without causing the machine to lock up or to clear storage. An interlock switch is activated prior to the cartridge, making electrical contact with a bus to trigger a bus interlock algorithm. When the cartridge is fully inserted, it is latched, and the interlock switch is opened. A cartridge 1 (Fig. 1) is inserted into a cavity 2 of a housing 3 by the cartridge 1 opening a spring-loaded door 4. The door 4 is resiliently urged to its closed position about its pivot 5. When the cartridge 1 is partially inserted into the cavity 2 of the housing 3, as shown in Fig. 1, an interlock switch 6, which is a cantilevered conductive beam attached to a printed circuit card 7 by a rivet 8, is moved by the door 4 from its dotted line position to the solid line position. This results in a dimple 9 on the interlock switch 6 bridging two lands (not shown) on the printed circuit card 7 to invoke an interrupt of a master processor that interrupts all other bus activity until the interrupt generated by the switch 6 is cleared. An interrupt algorithm is shown in Fig. 3. As a printed circuit card 10 in the cartridge 1 seats within a connector 11, which is within the cavity 2 of the housing 3 and connected to the printed circuit card 7, as shown in Fig. 2, the switch 6 rises upwardly so that the dimple 9 no longer engages the lands on the printed circuit card 7. Thus, the interl...