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General Purpose Interface Receiver Using Short Channel CMOS Devices

IP.com Disclosure Number: IPCOM000059676D
Original Publication Date: 1986-Jan-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Swietek, D: AUTHOR

Abstract

It is very difficult to design a high-performance off-chip receiver using FET (field-effect transistor) devices that will accept small voltage levels and power supply. This is due partially to the inherently lower Gm (transconductance) of such devices as compared to bipolar devices. This article describes how such a design can now be achieved using available "very short channel" FETs. Fig. 1 shows the schematic of a standard CMOS (complementary metal oxide semiconductor) differential amplifier with a single-ended output. Devices Q1 and Q2 are the input devices with a static discharge structure attached. The devices Q11, Q12, and Q13 generate approximately 1.05 volts, which is used for the signal reference and current source gate bias.

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General Purpose Interface Receiver Using Short Channel CMOS Devices

It is very difficult to design a high-performance off-chip receiver using FET (field- effect transistor) devices that will accept small voltage levels and power supply. This is due partially to the inherently lower Gm (transconductance) of such devices as compared to bipolar devices. This article describes how such a design can now be achieved using available "very short channel" FETs. Fig. 1 shows the schematic of a standard CMOS (complementary metal oxide semiconductor) differential amplifier with a single-ended output. Devices Q1 and Q2 are the input devices with a static discharge structure attached. The devices Q11, Q12, and Q13 generate approximately 1.05 volts, which is used for the signal reference and current source gate bias. The input and reference devices must have very high W/L ratio in order to minimize variations in the threshold voltage. For this circuit, using short-channel devices, the threshold voltage variation is of the order of 350 mV which, while not as tight as a bipolar device, is acceptable. The performance obtained is: Tp=1.7 ns @ 2.24 mW @ 20 MHz 50% DC. This may be realized with signal swings of the order of Vinput = 1.5 volts. Fig. 2 shows the schematic for the static discharge device identified by * in Fig. 1. The discharge device consists of two turned-off P-type FETs connected and biased such that, if a voltage at the input signal pin is either above Vdd or below...