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Synchronization of Microprocessor Address Strobe Using LSSD Hardware

IP.com Disclosure Number: IPCOM000059682D
Original Publication Date: 1986-Jan-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 52K

Publishing Venue

IBM

Related People

Boguski, MJ: AUTHOR [+3]

Abstract

The synchronization of a Motorola 68000 microprocessor's address strobe with the system clocks of a microprocessor-based system with level sensitive scan design (LSSD)-type hardware permits the development of a timing ring so that the LSSD hardware can control the 68000 microprocessor and its attached hardware. Fig. 1 shows a timing diagram of a read cycle using the 68000 microprocessors on a processing unit (PU) card. The "S" times in the oscillator wave in the diagram are 68000 internal timing pulses. As seen in the diagram, the 68000 address strobe can become active anytime after the rise of S2 and before the rise of S4. It can become inactive anytime after the rise of S7 and before the rise of S1. The address strobe is synchronized with the internal timing ring of the 68000 microprocessor.

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Synchronization of Microprocessor Address Strobe Using LSSD Hardware

The synchronization of a Motorola 68000 microprocessor's address strobe with the system clocks of a microprocessor-based system with level sensitive scan design (LSSD)-type hardware permits the development of a timing ring so that the LSSD hardware can control the 68000 microprocessor and its attached hardware. Fig. 1 shows a timing diagram of a read cycle using the 68000 microprocessors on a processing unit (PU) card. The "S" times in the oscillator wave in the diagram are 68000 internal timing pulses. As seen in the diagram, the 68000 address strobe can become active anytime after the rise of S2 and before the rise of S4. It can become inactive anytime after the rise of S7 and before the rise of S1. The address strobe is synchronized with the internal timing ring of the 68000 microprocessor. The address strobe is synchronized with the TC pulse. The TC pulse is used to create the remainder of the timing ring which is in sync with the 68000 S4 pulse. Use of the timing ring allows the LSSD hardware to control the 68000 microprocessor. Fig. 2 is the LSSD design for the address strobe synchronization.

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