Browse Prior Art Database

Recessed Oxide Isolation Process

IP.com Disclosure Number: IPCOM000059714D
Original Publication Date: 1986-Jan-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Lajza, JJ: AUTHOR [+2]

Abstract

A recessed oxide isolation process for forming high density bipolar structures is provided which minimizes crystal defects caused by silicon to oxide expansion mismatch during high temperature processing steps after recessed oxide is introduced into a semiconductor substrate. In this process, the recessed oxide is formed after the high temperature diffusion steps have been completed and the recessed oxide is grown at relatively low temperatures. The process provides for butted emitters and contacts, if desired. The process may be better understood by referring to Figs. 1 and 2 wherein the formation of an NPN bipolar transistor is illustrated. A P type semiconductor substrate 10 has an N type epitaxial layer 12 grown thereon with an N+ subcollector region 14 and P+ isolation regions 16 formed in any known manner.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 54% of the total text.

Page 1 of 2

Recessed Oxide Isolation Process

A recessed oxide isolation process for forming high density bipolar structures is provided which minimizes crystal defects caused by silicon to oxide expansion mismatch during high temperature processing steps after recessed oxide is introduced into a semiconductor substrate. In this process, the recessed oxide is formed after the high temperature diffusion steps have been completed and the recessed oxide is grown at relatively low temperatures. The process provides for butted emitters and contacts, if desired. The process may be better understood by referring to Figs. 1 and 2 wherein the formation of an NPN bipolar transistor is illustrated. A P type semiconductor substrate 10 has an N type epitaxial layer 12 grown thereon with an N+ subcollector region 14 and P+ isolation regions 16 formed in any known manner. A reach-through region 18 is provided which extends from the surface of epitaxial layer 12 to subcollector region 14 and a P+ base region 20 is formed by diffusing or implanting a boron impurity through an opening in a field oxide layer 22. The surface of base region 20 is reoxidized forming a thin oxide layer 24 thereover. A first layer of silicon nitride 26 is deposited over oxide layers 22 and 24. A plurality of openings are then formed in silicon nitride layer 26. A first opening 28 is provided for a collector contact, a second opening 30 is used for a base contact, a third opening 32 is used to define an emitter and a...