Browse Prior Art Database

CMOS Toggle Flip-Flop

IP.com Disclosure Number: IPCOM000059728D
Original Publication Date: 1986-Jan-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Downey, JH: AUTHOR

Abstract

This CMOS (Complementary Metal Oxide Semiconductor) Toggle Flip-Flop (TFF) circuit features fewer field-effect transistor devices to perform the function of toggle control for a master/slave latch. The TFF circuit illustrated consists of three parts: a switching circuit 3 which controls a master latch 1, and a slave latch 2, both latches being positive-edge triggered by the switching circuit. Four devices (3 N-type and 1 P-type) control the input to the TFF, and the circuit operation overview is shown in the state diagram. The TFF operates as follows: .IN 5 1) The clear line (CLR), which is independent of the clock (CLK), is pulsed high, "1". The output goes low, "0". The TFF is now primed for operation.

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CMOS Toggle Flip-Flop

This CMOS (Complementary Metal Oxide Semiconductor) Toggle Flip-Flop (TFF) circuit features fewer field-effect transistor devices to perform the function of toggle control for a master/slave latch. The TFF circuit illustrated consists of three parts: a switching circuit 3 which controls a master latch 1, and a slave latch 2, both latches being positive-edge triggered by the switching circuit. Four devices (3 N-type and 1 P-type) control the input to the TFF, and the circuit operation overview is shown in the state diagram. The TFF operates as follows:
.IN 5 1) The clear line (CLR), which is independent of the clock (CLK), is pulsed high, "1". The output goes low, "0". The TFF is now primed for operation. 2a) Data Out (DO) of the TFF will remain "0" until Data In (DI) and the leading edge of the clock pulse initiate a switching sequence. 2b) DO = "0", DI = "1" causes nodes A and A' to go high, "1". The "1" is propagated to DO. 3a) The output of the TFF will remain at "1" until DI goes to "1" again (or remains at "1"). 3b) DO = "1", DI = "1" causes nodes A and A' to go low, "0". The "0" is propagated to DO. Because the circuit utilizes so very few devices to toggle the flip-flop, a savings in silicon area and power dissipation is realized.

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