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Static Sense Amplifier

IP.com Disclosure Number: IPCOM000059729D
Original Publication Date: 1986-Jan-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 60K

Publishing Venue

IBM

Related People

Loehlein, WD: AUTHOR

Abstract

As conventional sense amplifiers (Fig. 1) switch at predetermined voltage levels, the bit lines frequently have to be charged or discharged beyond a particular level, increasing the random-access memory (RAM) time. This disadvantage is eliminated by a sense amplifier which is triggered as a function of its preceding switching state (Fig. 2). Depending upon the respective switching state, transistors are switched on and off in a time-delayed fashion by an inverter chain, such that the trigger level is moved closer to the respective bit line potential. Thus, even slight changes of the latter cause the sense amplifier to be switched in the right direction, with the great hysteresis obtained allowing a substantial reduction of RAM time.

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Static Sense Amplifier

As conventional sense amplifiers (Fig. 1) switch at predetermined voltage levels, the bit lines frequently have to be charged or discharged beyond a particular level, increasing the random-access memory (RAM) time. This disadvantage is eliminated by a sense amplifier which is triggered as a function of its preceding switching state (Fig. 2). Depending upon the respective switching state, transistors are switched on and off in a time-delayed fashion by an inverter chain, such that the trigger level is moved closer to the respective bit line potential. Thus, even slight changes of the latter cause the sense amplifier to be switched in the right direction, with the great hysteresis obtained allowing a substantial reduction of RAM time.

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