Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Dynamic True/Complement Generator

IP.com Disclosure Number: IPCOM000059739D
Original Publication Date: 1986-Jan-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Bula, J: AUTHOR [+2]

Abstract

A dynamic true/complement (T/C) circuit is described which simultaneously precharges true and complement outputs low. If this circuit is used to drive decoders, all the decoder outputs will be set initially to a logic "one" state. Upon the occurrence of a timed clock signal, the T/C circuit will take the correct true and complement state, and all the unselected decoder outputs will quickly go to a logic "zero" state. Noise immunity is achieved by using dynamic clocking and transfer devices. When this T/C circuit is used in other applications, e.g., logic, read only stores, etc., it often provides similar benefits. The dynamic T/C generator or circuit has two clocks CK1 and CK2, as shown in the figure. Clock CK1 is used to precharge the outputs so that both true and complement outputs are low.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 70% of the total text.

Page 1 of 2

Dynamic True/Complement Generator

A dynamic true/complement (T/C) circuit is described which simultaneously precharges true and complement outputs low. If this circuit is used to drive decoders, all the decoder outputs will be set initially to a logic "one" state. Upon the occurrence of a timed clock signal, the T/C circuit will take the correct true and complement state, and all the unselected decoder outputs will quickly go to a logic "zero" state. Noise immunity is achieved by using dynamic clocking and transfer devices. When this T/C circuit is used in other applications, e.g., logic, read only stores, etc., it often provides similar benefits. The dynamic T/C generator or circuit has two clocks CK1 and CK2, as shown in the figure. Clock CK1 is used to precharge the outputs so that both true and complement outputs are low. This enables all the array decoders to be precharged to a logic "one" state, which can then be quickly discharged resulting in high performance. Note that while clock CK1 is high, clock CK2 must be held low. Clock CK2 is used to gate in the T/C input and discharge one of the two nodes A or B depending on the input data value. Clock CK2 also serves to isolate the outputs of the T/C generator from the inputs. When clock CK2 goes low, the input is latched and any noise present at the input terminal does not affect the outputs. This results in noise immunity for circuit reliability. Another feature of this T/C generator is the ability to provide...