Browse Prior Art Database

Personal Computer Interrupt Handler Implementation

IP.com Disclosure Number: IPCOM000059793D
Original Publication Date: 1986-Jan-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Detschel, WF: AUTHOR

Abstract

In an Intel 8088 processor-based system, such as the IBM Personal Computer, adding new hardware to the system may necessitate providing an interrupt handler to service hardware interrupts associated with the device, or a user may wish to handle existing device interrupts in a different way. The present invention is a method that addresses both of these concerns. The invention is an assembler language program that allows coding of a personalized system interrupt handler in Pascal or a similar high level language. In prior-art systems such interrupt handler programs are written entirely in assembler code. The use of the present invention allows the routines to be programmed in a high level language and therefore to be readable, easily understood, more maintainable, and easier to modify.

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Personal Computer Interrupt Handler Implementation

In an Intel 8088 processor-based system, such as the IBM Personal Computer, adding new hardware to the system may necessitate providing an interrupt handler to service hardware interrupts associated with the device, or a user may wish to handle existing device interrupts in a different way. The present invention is a method that addresses both of these concerns. The invention is an assembler language program that allows coding of a personalized system interrupt handler in Pascal or a similar high level language. In prior-art systems such interrupt handler programs are written entirely in assembler code. The use of the present invention allows the routines to be programmed in a high level language and therefore to be readable, easily understood, more maintainable, and easier to modify. The figure is a block diagram of the invention. Two assembler routines are used. One routine (not shown) sets up the system interrupt vector 10 to point to an interrupt handler 'front end'. This first routine is executed at system initialization time. The second, front end routine 20, 40 is executed when an interrupt occurs. This routine, which is basically an interrupt handler, performs common interrupt service functions in two parts, 20 and 40. The first part 20 performs several preparatory functions, including reenabling interrupts 22, saving the machine state on the system stack 24, and passing control 26 to the actual high leve...