Browse Prior Art Database

Common Decoder Logic Adapter for Hand-Held and Fixed-Head Scanner

IP.com Disclosure Number: IPCOM000059802D
Original Publication Date: 1986-Jan-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Broockman, EC: AUTHOR

Abstract

This article describes a logic circuit which permits common decoder logic to be used both with high speed check-out or fixed-head laser scanners and with much slower hand-held scanners. If an enable signal indicates the hand-held scanner is in use, the high-speed clock for the decoder logic is divided down to drive the logic at a much slower speed. Referring to the drawing, a hand-held scanner 10, which may either be an optical wand or a hand-held laser scanner, includes a data lead 12 to a multiplexer 14 and an enable lead 16 to a microprocessor 18. The signal on lead 16, which may be derived from an on-off switch on the hand-held scanner, is positive only when the scanner is in use.

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Common Decoder Logic Adapter for Hand-Held and Fixed-Head Scanner

This article describes a logic circuit which permits common decoder logic to be used both with high speed check-out or fixed-head laser scanners and with much slower hand-held scanners. If an enable signal indicates the hand-held scanner is in use, the high-speed clock for the decoder logic is divided down to drive the logic at a much slower speed. Referring to the drawing, a hand-held scanner 10, which may either be an optical wand or a hand-held laser scanner, includes a data lead 12 to a multiplexer 14 and an enable lead 16 to a microprocessor 18. The signal on lead 16, which may be derived from an on-off switch on the hand- held scanner, is positive only when the scanner is in use. A fixed-head scanner 20 includes a data lead 22 to the multiplexer 14 and a clock lead 24 which is supplied directly to one input of the multiplexer 26 and indirectly to another input of the same multiplexer through a divider circuit 28. Microprocessor 18 provides control inputs to the multiplexers 14 and 26, which have data and clock outputs, respectively, to common decoder logic 30. When hand-held scanner 10 is in use, microprocessor 18 generates a signal which causes data on lead 12 to be selected. The same signal causes the output of divider circuit 28 to be passed through multiplexer 26 as a "slow" clock for the common decoder logic 30. When the fixed-head scanner is in use, the signal provided by microprocessor...