Browse Prior Art Database

Lead-Bonding Placement Apparatus

IP.com Disclosure Number: IPCOM000060184D
Original Publication Date: 1986-Mar-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 53K

Publishing Venue

IBM

Related People

Bora, MY: AUTHOR

Abstract

The apparatus shown in Figs. 1 and 2 allows the assembly of various sized area chips to flexible decal/tape frames and accurately aligns interconnection pads on chips to appropriate decal/tape locations. The arrangement involves placing the chip on a vacuum platform, and positioning a decal/tape with a layer of flux on it. The vacuum/ orientation pins shown in Fig. 1 align the chips to a frame while the surface tension of the flux holds the chip in place. The apparatus requires the following: A silicon chip is provided with a suitable connector surface (such as peripheral area array C4-type pads). Along with a carrier with circuit lines on the surface (decal/ tape). The vacuum in combination with the surface tension of the flux will eliminate misalignment of chips and minimize rework or subassembly.

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Lead-Bonding Placement Apparatus

The apparatus shown in Figs. 1 and 2 allows the assembly of various sized area chips to flexible decal/tape frames and accurately aligns interconnection pads on chips to appropriate decal/tape locations. The arrangement involves placing the chip on a vacuum platform, and positioning a decal/tape with a layer of flux on it. The vacuum/ orientation pins shown in Fig. 1 align the chips to a frame while the surface tension of the flux holds the chip in place. The apparatus requires the following: A silicon chip is provided with a suitable connector surface (such as peripheral area array C4-type pads). Along with a carrier with circuit lines on the surface (decal/ tape). The vacuum in combination with the surface tension of the flux will eliminate misalignment of chips and minimize rework or subassembly. The weight of the fixture (Figs. 1 and 2) during subsequent reflow will minimize non-wets and process defects which might occur from nonplanarity of decal/tape with chips.

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