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DMA Page Overflow Controller

IP.com Disclosure Number: IPCOM000060538D
Original Publication Date: 1986-Apr-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 14K

Publishing Venue

IBM

Related People

Fussell, DK: AUTHOR [+2]

Abstract

A method is described which prevents an application program which requires a buffer that will be involved in Direct Memory Access (DMA) data transfers from being assigned a memory location which results in the buffer straddling a page boundary in memory. The IBM Personal Computer DMA Controller hardware chip is able to conduct a data transfer of up to 64K bytes of data during a single activation. However, there is a hardware limitation on the location of the 64K bytes in CPU memory. The DMA transfer can involve only a single hardware memory page, which has fixed boundary every 64K (e.g., DMA Page 0 is absolute memory location 0 to 64K, DMA page 1 is absolute memory location 64K to 128K, etc.).

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DMA Page Overflow Controller

A method is described which prevents an application program which requires a buffer that will be involved in Direct Memory Access (DMA) data transfers from being assigned a memory location which results in the buffer straddling a page boundary in memory. The IBM Personal Computer DMA Controller hardware chip is able to conduct a data transfer of up to 64K bytes of data during a single activation. However, there is a hardware limitation on the location of the 64K bytes in CPU memory. The DMA transfer can involve only a single hardware memory page, which has fixed boundary every 64K (e.g., DMA Page 0 is absolute memory location 0 to 64K, DMA page 1 is absolute memory location 64K to 128K, etc.). Any attempt to transfer data from both sides of one of these boundaries, no matter how small the length of that data, requires two DMA activations. The IBM 5520/PC Attachment software contains a 16K buffer in PC main memory that is used to transfer the Level 3 data stream to and from the 5520. These transfers use DMA, and since the maximum size of a level 3 transfer is 16K, only a single DMA activation should be required per transfer. However, the IBM 5520/PC Attachment program is loaded by PC-DOS, and may end up located in PC memory at any point PC-DOS chooses. In particular, the program may be loaded with the 16K data stream buffer straddling two DMA hardware pages. Unfortunately, the DMA Controller will wrap memory when a program attempts to transfer across a hardware page boundary. For the IBM 5520/PC Attachment program, this results in the PC locking up, requiring a power-off, power-on to recover. Further, there is no way to check for the memory wrap condition after it occurs. A program seeking to prevent this problem from happening would have to evaluate extensively any data being transferred and, if needed, resort to two DMA activations. This is difficult and consuming in execution speed and program size, since every proposed DMA transfer would have to be examined before being carried out. The above problem would appear to be a vulnerable point of a large quantity of existing softwa...