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A Simple Symmetrical Transistor Using Selective Epitaxy

IP.com Disclosure Number: IPCOM000060636D
Original Publication Date: 1986-Mar-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Arienzo, M: AUTHOR [+3]

Abstract

Symmetrical bipolar-transistors can be fabricated by using selective epitaxy and relying on the faster oxidation rate of p+ polysilicon to self-align the emitter region.

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A Simple Symmetrical Transistor Using Selective Epitaxy

Symmetrical bipolar-transistors can be fabricated by using selective epitaxy and relying on the faster oxidation rate of p+ polysilicon to self-align the emitter region.

The process deposits oxide, polysilicon and oxide layers on a substrate in which trenches and a subcollector region have already been formed. The layers which have been deposited on the surface are then etched to form emitter and reach-through regions. Following, thereto, p+ polysilicon is deposited a reactive ion etched to form polysilicon sidewalls in the emitter and the reach-through etched areas. Epitaxial silicon is selectively grown in the openings such that an epitaxial gr region and a polysilicon growth region are formed adjacent respective single crystal and polycrystalline regions. This results in an epitaxial growth region which has a smaller width at its top than at its bottom. The last mentioned epitaxial region is N- conductivity type. At this point the self-aligned oxide can be grown relying on the fewer oxidation use of the highly doped polysilicon with respect to the exposed single crystal emitter region. After ion implanting the base and forming an emitter by outdiffusion from an N+ poly region, base, emitter and collector contacts are formed.

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