Browse Prior Art Database

Coaxial Line Activity Monitor for New Display System

IP.com Disclosure Number: IPCOM000060761D
Original Publication Date: 1986-May-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 80K

Publishing Venue

IBM

Related People

Correnti, JA: AUTHOR [+5]

Abstract

A technique is described whereby a line monitor provides a method of tracing and storing coaxial communications data between a control unit and any attached operational device so as to facilitate debugging, testing and trouble-shooting of the operational devices when operating under high-speed new display system (NDS) format biphase data protocol. The line monitor, as shown in the block diagram (Fig. 1), consists of a control adapter which resides in the input/output (I/O) section of an IBM PC, XT, or AT personal computer which is connected to the coaxial line to be monitored using a coax T-connector.

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Coaxial Line Activity Monitor for New Display System

A technique is described whereby a line monitor provides a method of tracing and storing coaxial communications data between a control unit and any attached operational device so as to facilitate debugging, testing and trouble- shooting of the operational devices when operating under high-speed new display system (NDS) format biphase data protocol. The line monitor, as shown in the block diagram (Fig. 1), consists of a control adapter which resides in the input/output (I/O) section of an IBM PC, XT, or AT personal computer which is connected to the coaxial line to be monitored using a coax T-connector. The control adapter contains 64K x 8 bytes of shared dynamic random-access memory (RAM) which is accessible to the NDS control adapter, the high-speed data link data management adapter (DMA) and the system board processor (SBP) installed in the system board of the personal computer. This provides shared control of storage for inter-processor communications as well as for buffering high-speed outbound or inbound linkage of data and commands. At power-on, the NDS control adapter is disabled so that the shared control storage is accessible by only the SBP. The SBP can then verify the functionality of the control storage and load the micro-instruction into control storage RAM. The SBP then enables the NDS control adapter with a hardware wake-up strobe. For operation of the monitor, custom software consists of microcode for executing in the link control processor and microcode for executing in the SBP. The operator has the option...