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Software-Controlled Wrap-Around Buffer

IP.com Disclosure Number: IPCOM000060766D
Original Publication Date: 1986-May-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 3 page(s) / 39K

Publishing Venue

IBM

Related People

Clegg, JA: AUTHOR [+4]

Abstract

The Buffer Queue Function is a software tool which allows two independent processors to control a limited buffer area efficiently. The function will increase the overall throughput and utilization of a limited buffer area. The Data Buffer Queue Function requires an attachment card with a microprocessor (hereafter referred to as the Attachment Processor) and a data buffer. The Data Buffer Queue Function will divide a given buffer area, on the attachment card, into four equal sections. Each of these sections may then be accessed, asynchronously, by either the Attachment Processor or the controlling Host Processor. The communication between the two processors is achieved by the use of queue register 10 which contains four bits. Each bit of queue register 10 relates directly to an area of the segmented buffer.

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Software-Controlled Wrap-Around Buffer

The Buffer Queue Function is a software tool which allows two independent processors to control a limited buffer area efficiently. The function will increase the overall throughput and utilization of a limited buffer area. The Data Buffer Queue Function requires an attachment card with a microprocessor (hereafter referred to as the Attachment Processor) and a data buffer. The Data Buffer Queue Function will divide a given buffer area, on the attachment card, into four equal sections. Each of these sections may then be accessed, asynchronously, by either the Attachment Processor or the controlling Host Processor. The communication between the two processors is achieved by the use of queue register 10 which contains four bits. Each bit of queue register 10 relates directly to an area of the segmented buffer. The drawing illustrates an 8K buffer area 20 which has been segmented into four 2K-byte sections and the queue register bits which would be assigned to each segment. Whenever a section contains valid data, the processor which loaded the data will turn on the associated section bit in the queue register 10. Each processor must track the following parameters: The last section area accessed--This parameter allows the processor to know which section to transfer next, should the queue register 10 reach a value of 'XXXX0000'B or 'XXXX1111'B during the transfer. This situation will arise when one processor transfers data at a faster rate than the other. The total data transfer length--Both processors must know when the transfer is complete so that no extraneous data is transferred. The start address of the data buffer--The processor will use this parameter to reset the data pointer back to the start of the buffer area whenever section 1 is to be accessed. The following is an example of a writer operation using the Data Buffer Queue Function. The Host Processor will load the first two sections of the attachment's data buffer. The Host will set bits 4 and 5 in queue register 10 to indicate that these areas now contain valid data. The Host Processor issues the write command to the Attachment Processor. The Attachment Processor will start the write operation and concurrently interrupt the Host Processor for more data. The Host Processor will consecutively fill all sections that have a value of '0' in their Queue Register bits. After the sections have been filled, the Host will set the appropriate bits in the queue register 10. The Attachment Processor will turn off a section's bit in the queue register 10 after the section has...