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Controlled Transition, Short Circuit Current Regulated Off Chip Driver

IP.com Disclosure Number: IPCOM000060826D
Original Publication Date: 1986-May-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Tessitore, RJ: AUTHOR [+2]

Abstract

A circuit that minimizes noise and ground bounce due to fast switching transitions of off chip drivers ("OCDs") by extending the duration of the switching time is constructed and operates as follows. LSI chip technology has advanced to the point where many input/ output circuits may be necessary for a single chip, many requiring OCDs. I/O connections require output and ground lands to permit the electrical interface connection. These lands however contain inductance which gives rise to transient voltage spikes in the ground produced by the di/dt during switching transitions. Particularly, when many OCDs switch simultaneously, the resultant ground voltage spike can be large enough to cause spurious switching in the chip.

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Controlled Transition, Short Circuit Current Regulated Off Chip Driver

A circuit that minimizes noise and ground bounce due to fast switching transitions of off chip drivers ("OCDs") by extending the duration of the switching time is constructed and operates as follows. LSI chip technology has advanced to the point where many input/ output circuits may be necessary for a single chip, many requiring OCDs. I/O connections require output and ground lands to permit the electrical interface connection. These lands however contain inductance which gives rise to transient voltage spikes in the ground produced by the di/dt during switching transitions. Particularly, when many OCDs switch simultaneously, the resultant ground voltage spike can be large enough to cause spurious switching in the chip. Described herein is a circuit which slows the transition time for an OCD, thus reducing the transient voltage spike produced by the aforementioned inductive effects. The invention is shown in the drawing. Pad 6 represents the electrical interface land for the output of the driver circuit 10. Resistor 7 represents the output load resistance, and capacitor 8 the output load capacitance. For the output to discharge (go low), the inputs of NAND gate 1 must be set to a valid high level. Inverter 2's output going high enables driver transistor 3 to start discharge of the pad. In the absence of other components, as is the case in conventional off chip drivers, device 3 would be approx...