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Method for Detecting Memory Addressing Errors With a Modified ECC Algorithm

IP.com Disclosure Number: IPCOM000060885D
Original Publication Date: 1986-May-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 60K

Publishing Venue

IBM

Related People

Henning, L: AUTHOR [+3]

Abstract

A technique is described whereby an error correcting code (ECC) algorithm is modified so as to detect addressing errors in computer memory modules. ECC algorithms provide a reliable means of detecting and correcting errors in data words as the data is being processed by a computer. The data is usually written into a random-access memory (RAM) unit and check bits are generated with syndrome exclusive ORs for the check bit patterns. A typical check bit pattern would be seven bits for a 32-bit data word which would be stored in memory. When the data word is later fetched, the check bits are generated again and compared with the check bits stored in memory. If a difference occurs during the comparison, the combination of check bits will point to the bit that is in error so as to perform a correction.

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Method for Detecting Memory Addressing Errors With a Modified ECC Algorithm

A technique is described whereby an error correcting code (ECC) algorithm is modified so as to detect addressing errors in computer memory modules. ECC algorithms provide a reliable means of detecting and correcting errors in data words as the data is being processed by a computer. The data is usually written into a random-access memory (RAM) unit and check bits are generated with syndrome exclusive ORs for the check bit patterns. A typical check bit pattern would be seven bits for a 32-bit data word which would be stored in memory. When the data word is later fetched, the check bits are generated again and compared with the check bits stored in memory. If a difference occurs during the comparison, the combination of check bits will point to the bit that is in error so as to perform a correction. However, if an address bit is in error, the ECC check bits will still be correct but incorrect data or instructions will be tagged as being valid, causing undetected memory addressing errors to occur. To overcome this problem of undetected memory addressing errors, an odd parity is generated for all address bytes being sent to memory. The parity bits are then used as input to the ECC generator to create three new syndrome code points so as to detect addressing errors. A typical ECC syndrome is shown in the table below with th modified ECC code points indicated. Fig. 1 shows the 'H' matrix for ECC...