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Fast Sense Latch for a CMOS Static Ram

IP.com Disclosure Number: IPCOM000060891D
Original Publication Date: 1986-May-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Aipperspach, AG: AUTHOR [+3]

Abstract

Fig. 1 shows the circuit implementation of a fast CMOS sense latch. Initially C1 is high and C2 is low. Bit Lines BL1 and BL2 are precharged to VDD-VTn by devices 1 and 2. BLT and BLC are precharged to VDD by devices 5 and 6. Nodes A and B are discharged to ground by devices 11 and 14. When a read operation is performed, C1 goes low and C2 goes high. BL1 slowly discharges to ground via the storage cell, if a stored "One" is being sensed. If bit decode signal BSO is high, device 4 is on. BLT begins to discharge to the level of BL1 via device 4. When BLT falls to VDD-VTp, device 9 turns on and quickly charges node B to VDD. The data value of the storage cell can now be latched in the output data latch. In the case of the stored "One", devices 3 and 9 perform the same operation when BL2 discharges to ground.

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Fast Sense Latch for a CMOS Static Ram

Fig. 1 shows the circuit implementation of a fast CMOS sense latch. Initially C1 is high and C2 is low. Bit Lines BL1 and BL2 are precharged to VDD-VTn by devices 1 and 2. BLT and BLC are precharged to VDD by devices 5 and 6. Nodes A and B are discharged to ground by devices 11 and 14. When a read operation is performed, C1 goes low and C2 goes high. BL1 slowly discharges to ground via the storage cell, if a stored "One" is being sensed. If bit decode signal BSO is high, device 4 is on. BLT begins to discharge to the level of BL1 via device 4. When BLT falls to VDD-VTp, device 9 turns on and quickly charges node B to VDD. The data value of the storage cell can now be latched in the output data latch. In the case of the stored "One", devices 3 and 9 perform the same operation when BL2 discharges to ground. Devices 7, 8, 12 and 13 are used to retain the sensed data throughout the time when C1 is low and C2 is high. Fig. 2 shows the relationships of the B, BL1 and BLT signals during a read.

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