Browse Prior Art Database

Three-State Driver Circuit

IP.com Disclosure Number: IPCOM000060936D
Original Publication Date: 1986-Jun-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 44K

Publishing Venue

IBM

Related People

Gaudenzi, GJ: AUTHOR [+3]

Abstract

Disclosed is a three-state push-pull driver circuit designed to interface from on-chip TTL circuits to off-chip TTL circuits. The driver is powered from a 3.4-volt and 1.7-volt supply. At least certain features of this driver circuit are as follows: The output voltage up- and down-going transitions have a desirable dv/dt characteristic, which aids off-chip wireablility and reduces noise generation. Up-going dv/dt control is determined by R6, R7 and T4. Down-going dv/dt control is determined by feedback capacitor CF and resistors R2, R3, R4, R9 and transistors T2, T3 and T5. The two inputs of T8 are provided for driver high impedance control (both system and test applications). A logical "0" at an input to T8 will cause T6 and T3 to turn on and disable the driver.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 97% of the total text.

Page 1 of 2

Three-State Driver Circuit

Disclosed is a three-state push-pull driver circuit designed to interface from on- chip TTL circuits to off-chip TTL circuits. The driver is powered from a 3.4-volt and 1.7-volt supply. At least certain features of this driver circuit are as follows: The output voltage up- and down-going transitions have a desirable dv/dt characteristic, which aids off-chip wireablility and reduces noise generation. Up- going dv/dt control is determined by R6, R7 and T4. Down-going dv/dt control is determined by feedback capacitor CF and resistors R2, R3, R4, R9 and transistors T2, T3 and T5. The two inputs of T8 are provided for driver high impedance control (both system and test applications). A logical "0" at an input to T8 will cause T6 and T3 to turn on and disable the driver. When the driver is in the high impedance state, and the output voltage rises under control of another driver (not shown) on the net (not shown), the clamp network including R8, T7, D2, D3 and R7 will limit the reverse emitter-base voltage of T4, thus preventing beta degradation of T4 (a problem of high performance transistors). The driver input threshold is 0.9 volt and is determined by T1, R1 and 1.7 volts. The bulk resistance of diode D1 limits the short-circuit current of T4 and also provides reverse breakdown protection to T4 in the absence of power sequencing of the
3.4-volt supply and other supplies associated with the "dotted" drivers (not shown).

1

Page 2 of 2

2

[This...