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Universal Asynchronous Receiver Transmitter Data Loss Detection Arrangement

IP.com Disclosure Number: IPCOM000061019D
Original Publication Date: 1986-Jun-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Brown, JN: AUTHOR [+2]

Abstract

A method is described to detect the loss of data when using the asynchronous communication card of the IBM Personal Computer (PC). Under normal conditions, a data character transmitted to the universal asynchronous receiver transmitter (UART) is assembled as a complete character when a start bit, 5-8 data bits, an optional parity bit, and a stop bit is received. The data bits are transferred into a buffer that can be read by the microprocessor when the leading edge of the stop bit is detected. The UART will then signal that a data character is present via a data ready status bit in a status register, when the midpoint of the stop bit occurs. The data ready signal can also be programmed to generate an interrupt.

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Universal Asynchronous Receiver Transmitter Data Loss Detection Arrangement

A method is described to detect the loss of data when using the asynchronous communication card of the IBM Personal Computer (PC). Under normal conditions, a data character transmitted to the universal asynchronous receiver transmitter (UART) is assembled as a complete character when a start bit, 5-8 data bits, an optional parity bit, and a stop bit is received. The data bits are transferred into a buffer that can be read by the microprocessor when the leading edge of the stop bit is detected. The UART will then signal that a data character is present via a data ready status bit in a status register, when the midpoint of the stop bit occurs. The data ready signal can also be programmed to generate an interrupt. A data overrun condition results if a second character is received by the UART before a read operation is performed for the first character (the overrun is flagged when the midpoint of the stop bit of the second character is detected). The data loss condition occurs under the following circumstances: A character has been assembled by the UART and that data ready signal has been asserted. A second character is then received by the UART and transferred into the buffer at the leading edge of the stop bit. A read operation is now performed to read the first character. This read operation will result in the data for the second character being read since the second character is transferr...