Browse Prior Art Database

Bipolar Impulse Circuit

IP.com Disclosure Number: IPCOM000061026D
Original Publication Date: 1986-Jun-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Montegari, F: AUTHOR

Abstract

This article describes a bipolar circuit which, while offering many of the desirable performance features of a CMOS (complementary metal oxide semiconductor) circuit, can be fabricated in a standard bipolar device process. The disclosed circuit offers bipolar compatibility together with low power dissipation and will operate over a very wide range of voltages with non-critical tolerances. In Fig. 1, the bipolar impulse circuit is shown configured as a two-input NAND function and in Fig. 2 as a two-input NOR. High input impedance is achieved in each example by the use of high value resistors R1, R2, R3, and R4 to limit the input current, thereby preventing "current hogging" of the driving stage, while also increasing the DC input impedance.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 56% of the total text.

Page 1 of 2

Bipolar Impulse Circuit

This article describes a bipolar circuit which, while offering many of the desirable performance features of a CMOS (complementary metal oxide semiconductor) circuit, can be fabricated in a standard bipolar device process. The disclosed circuit offers bipolar compatibility together with low power dissipation and will operate over a very wide range of voltages with non-critical tolerances. In Fig. 1, the bipolar impulse circuit is shown configured as a two- input NAND function and in Fig. 2 as a two-input NOR. High input impedance is achieved in each example by the use of high value resistors R1, R2, R3, and R4 to limit the input current, thereby preventing "current hogging" of the driving stage, while also increasing the DC input impedance. Coupling capacitors C1, C2, C3, and C4, which shunt these resistors, couple fast transitions directly into the base of transistors T1, T2, T3 and T4, respectively, for high performance. Following an input transition, the charges on the input capacitors deplete through the input resistors and also through the base-emitter junctions of the transistors that are turning on. The capacitors thus require a recovery time, but this may be adjusted to be a small portion of the clock cycle time by proper choice of resistor and capacitor values. By way of example, in the Fig. 1 circuit, when a positive transition is applied to input A, it is coupled through C3 into the base of T3. C3 appears as a low impedance duri...