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Gate Structure for Midgap Gate CMOS

IP.com Disclosure Number: IPCOM000061066D
Original Publication Date: 1986-Jun-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 3 page(s) / 42K

Publishing Venue

IBM

Related People

Davari, B: AUTHOR

Abstract

A new gate structure, employing a thin buffer layer of undoped poly in between the gate oxide and mid-gap gate material, is proposed. The thin undoped poly layer which is completely depleted insures a reliable gate-oxide interface, while it is transparent to the work function of the mid-gap gate. For the sub 0.5 mm CMOS technology the gate material has to be different from the n+poly which is presently used in 1 mm CMOS technology. The major reason is the work function of the n+poly (Z4.2 eV) which is too low for sub 0.5 mm devices. One of the candidates for the new gate material is the mid-gap material (dmZ4.75 eV) such as tungsten or tungsten silicide. A major problem with this mid-gap gate material is the reliability of the gate-oxide interface. In this article the structure shown in Fig. 1 is proposed for the sub 0.

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Gate Structure for Midgap Gate CMOS

A new gate structure, employing a thin buffer layer of undoped poly in between the gate oxide and mid-gap gate material, is proposed. The thin undoped poly layer which is completely depleted insures a reliable gate-oxide interface, while it is transparent to the work function of the mid-gap gate. For the sub 0.5 mm CMOS technology the gate material has to be different from the n+poly which is presently used in 1 mm CMOS technology. The major reason is the work function of the n+poly (Z4.2 eV) which is too low for sub 0.5 mm devices. One of the candidates for the new gate material is the mid-gap material (dmZ4.75 eV) such as tungsten or tungsten silicide. A major problem with this mid-gap gate material is the reliability of the gate-oxide interface. In this article the structure shown in Fig. 1 is proposed for the sub 0.5 mm gate. The addition of a thin buffer layer of undoped poly in between the mid-gap gate material and the oxide provides a proven and reliable gate-oxide interface. Meanwhile, the work function of the mid-gap gate should still be applied to the silicon substrate (channel region) in order to provide the proper surface band bending. If the undoped poly layer is thin, then it will be completely depleted by any small difference between the mid-gap gate and the undoped poly work functions. Fig. 2 shows the band diagram arrangement of the gate structure before and after the intimate contact between the different layers for the thick poly layer condition. The parameters in Fig. 2 are as follows: dg : gate material work function x: silicon electron affinity Ef(g), Ef(p), Ef(s), = Fermi levels of the gate, poly, substrate, respectively Eg : silicon hand gap td1 td2 : depletion widths within the poly region tp : thickness of the poly buffer layer tox : oxide thickness In Fig. 2, the band diagram of the poly layer is obviously an approximation which is nevertheless sufficient to show the depletion effect. The poly layer is shown as n type, and the interface-states at gate-poly, poly-oxide and oxide-substrate junctions are neglected. The depletion width on the poly side of the gate/poly junction is td1, and it can be approximated by the following equation:

(Image Omitted)

where:dgp = work function difference between the gate and poly cgp = potential difference between the Fermi level and mid-gap Np = average carrier concentration in poly ep = poly dielectric constant If we assume: dgp = 0.1 V, Np = 1016 cm-3, epZ10-12 farad/cm, then td1Z1100 ~. Therefore, if the poly thickness is in the order of 100 ~ it will be completely depleted. The depletion region on...