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Epitaxial Configuration for Low Leakage Ser-Tolerant Silicon Material

IP.com Disclosure Number: IPCOM000061178D
Original Publication Date: 1986-Jul-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Chakravarti, S: AUTHOR [+3]

Abstract

A retarding electric field barrier for minority carriers, diffusing from an Si substrate, is created via an ion-implanted/epitaxially grown Player on a standard P- (11-16 ohm-cm) substrate. The barrier reduces the high temperature bulk diffusion leakage as well as the alpha particle sensitivity of field-effect transistor (FET) memory devices The field strength is dependent on the impurity concentration gradient between the P+ layer and the P- substrate. High interstitial oxygen concentration (0i < 1018/cm3) in Czochralski-grown Si wafers often leads to SiOx precipitation in the active device regions. Controlled oxygen precipitation by means of heat treatment of Si wafers results in high leakage currents at elevated temperature (- 45ŒC).

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Epitaxial Configuration for Low Leakage Ser-Tolerant Silicon Material

A retarding electric field barrier for minority carriers, diffusing from an Si substrate, is created via an ion-implanted/epitaxially grown Player on a standard P- (11-16 ohm-cm) substrate. The barrier reduces the high temperature bulk diffusion leakage as well as the alpha particle sensitivity of field-effect transistor (FET) memory devices The field strength is dependent on the impurity concentration gradient between the P+ layer and the P- substrate. High interstitial oxygen concentration (0i < 1018/cm3) in Czochralski-grown Si wafers often leads to SiOx precipitation in the active device regions. Controlled oxygen precipitation by means of heat treatment of Si wafers results in high leakage currents at elevated temperature (- 45OEC). This results in a poor charge transfer ratio from a memory cell to the sense amplifier via the bit line diffusion. Also, the passage of a high energy (~5 MeV) alpha particle through a semiconductor can generate minority carriers to a considerable depth below the semiconductor surface. The resulting minority carrier diffusion from the bulk of a semiconductor to the active device region can cause random non-recurring single-cell failure in FET dynamic random access memories, thus the development of a low leakage, SER (soft error rate)-tolerant Si material is essential for the advancement of VLSI technology. One such material configuration is an epitaxial Si layer of specified resistivity grown on a boron-implanted or epitaxially-grown Player on a P- substrate. The starting material is medium oxygen (27-35 ppm) Si wafers having resistivity in the 11-16 ohm-cm range (p-type). In the implanted process these wafers are subjected typically to a low energy (~175 KeV) blanket boron implant (dose 15x1013/cm2) on the front surface. After necessary annealing treatment in the 905OEC-...