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Chemical Vapor Deposited Device Isolation With Chemical/Mechanical Planarization

IP.com Disclosure Number: IPCOM000061208D
Original Publication Date: 1986-Jul-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 67K

Publishing Venue

IBM

Related People

Barson, F: AUTHOR [+2]

Abstract

The process uses chemical vapor deposited (CVD) fill and chemical/mechanical polishing for forming oxide-filled recessed oxide isolation (ROI) regions. This eliminates the need for long, high temperature, oxidation steps conventionally used to form ROI regions. The single chemical/mechanical polishing step planarizes both the trench polysilicon and the silicon dioxide layer used for ROI. Following is the process sequence for formation of the ROI regions: Grow N-type epitaxial layer over blanket N+ subcollector region. Grow thermal SiO2 and deposit Si3N4 layers. Mask with photoresist and reactive ion etch through Si3N4 layers. Mask with photoresist and reactive ion etch through Si3N4, SiO2 and N epitaxial layer into Nsubcollector region, to the full depth of the desired ROI. Strip photoresist (Fig. 1).

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Chemical Vapor Deposited Device Isolation With Chemical/Mechanical Planarization

The process uses chemical vapor deposited (CVD) fill and chemical/mechanical polishing for forming oxide-filled recessed oxide isolation (ROI) regions. This eliminates the need for long, high temperature, oxidation steps conventionally used to form ROI regions. The single chemical/mechanical polishing step planarizes both the trench polysilicon and the silicon dioxide layer used for ROI. Following is the process sequence for formation of the ROI regions: Grow N-type epitaxial layer over blanket N+ subcollector region. Grow thermal SiO2 and deposit Si3N4 layers. Mask with photoresist and reactive ion etch through Si3N4 layers. Mask with photoresist and reactive ion etch through Si3N4, SiO2 and N epitaxial layer into Nsubcollector region, to the full depth of the desired ROI. Strip photoresist (Fig. 1). Clean and chromic acid (CrO3) etch a few hundred Angstroms of silicon to remove surface damage. Thermally oxidize to line ROI cavities with about 1000 Angstroms of thermal oxide which provides a high quality Si-SiO2 interface, so that junctions may be butted against the ROI, if desired. A chemical vapor deposited (CVD) layer of Si3N4 may be added at this point for reliability purposes. CVD SiO2 ROI layers to overfill the ROI cavities. The CVD process may be carried out at a fairly high temperature to provide a dense fill, or densification may be carried out as a separate step. Planariza...