Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Indirect Diagnostic Register to Allow Software Reads of Direct Memory Access Registers

IP.com Disclosure Number: IPCOM000061319D
Original Publication Date: 1986-Jul-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 78K

Publishing Venue

IBM

Related People

Zimmerman, JP: AUTHOR

Abstract

A method is described for modifying the design of an Intel 8237-type Direct Memory Access (DMA) controller chip to allow software access to internal or normally write-only registers without increasing the address space required by the chip. In the normal IBM Personal Computer environment, a four-channel DMA controller is used. One of the four channels is used to refresh the dynamic memory. However, in an environment that uses static memory, this refresh channel is not needed, and the address space that is used by this channel is freed. The customized DMA controller design uses part of this freed address space to reference a new diagnostic register. The diagnostic register works in an indirect fashion to minimize its use of the available address space. One port address is used to read and write this 4-bit register.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 71% of the total text.

Page 1 of 2

Indirect Diagnostic Register to Allow Software Reads of Direct Memory Access Registers

A method is described for modifying the design of an Intel 8237-type Direct Memory Access (DMA) controller chip to allow software access to internal or normally write-only registers without increasing the address space required by the chip. In the normal IBM Personal Computer environment, a four-channel DMA controller is used. One of the four channels is used to refresh the dynamic memory. However, in an environment that uses static memory, this refresh channel is not needed, and the address space that is used by this channel is freed. The customized DMA controller design uses part of this freed address space to reference a new diagnostic register. The diagnostic register works in an indirect fashion to minimize its use of the available address space. One port address is used to read and write this 4-bit register. Another port address is used to read a register pointed to by the current contents of the diagnostic register. In this manner, the 4-bit register can access up to 16 other registers while using only 2 port addresses. The following table describes the operation of the checkout register:

(Image Omitted)

The MASK, MODE, COMMAND, REQUEST, AND

FIRST/LAST FLIP-FLOP are standard 8237 DMA controller features that would normally be inaccessible to software. This new DMA controller design decodes the contents of the checkout register in combination with the I/O read strobes and...