Browse Prior Art Database

I/O Key Translation Table

IP.com Disclosure Number: IPCOM000061431D
Original Publication Date: 1986-Aug-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 23K

Publishing Venue

IBM

Related People

Bhansali, M: AUTHOR [+8]

Abstract

Currently, input/output (I/O) devices for the IBM Series/1 processor are limited to 512 kilobytes (KB) of addressing. More physical storage on Series/1 is possible via extended architectures. A method is described for the I/O devices to address more than the upper 512 KB of physical storage. For example, ability to expand the 512 KB address into a 16-megabyte (MB) addressing range may be needed. Furthermore, to minimize software impacts and to maintain I/O device compatibility, the Series/1 Device Control Block (DCB)/Immediate Device Control Block (IDCB) I/O control structure is maintained. Thus, the expanded architecture is limited to eight I/O address keys. For supplementary background information, reference is made to the article on page 968 of this issue.

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I/O Key Translation Table

Currently, input/output (I/O) devices for the IBM Series/1 processor are limited to 512 kilobytes (KB) of addressing. More physical storage on Series/1 is possible via extended architectures. A method is described for the I/O devices to address more than the upper 512 KB of physical storage. For example, ability to expand the 512 KB address into a 16-megabyte (MB) addressing range may be needed. Furthermore, to minimize software impacts and to maintain I/O device compatibility, the Series/1 Device Control Block (DCB)/Immediate Device Control Block (IDCB) I/O control structure is maintained. Thus, the expanded architecture is limited to eight I/O address keys. For supplementary background information, reference is made to the article on page 968 of this issue. The many combinations of old and new I/O devices must be taken into account. In the approach used herein, a table is used to remap the 3-bit I/O key into the key of the program space requesting I/O. That is, I/O to/from an address space with a key greater than seven will need an alternate logical address based on an I/O key of 0-7. In this case, the same key or segment number can represent two different real storage areas simultaneously. This table is loaded with a channel directed command. This method permits eight keys to be translated and, thus, simultaneously remapped. Therefore, only eight I/O operations could be active simultaneously.

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