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Accurate Propagation Delay Time Measurement

IP.com Disclosure Number: IPCOM000061517D
Original Publication Date: 1986-Aug-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 70K

Publishing Venue

IBM

Related People

Ayers, RL: AUTHOR

Abstract

Programmed tester comparator devices are utilized for testing integrated circuit elements and modules. One problem with testing is that the drive voltage response of the tester is a function of the load imposed by the device under test. Variations in driver delay are not accounted for in normal device waveform propagation delay time measurements performed in such testers. The present testing technique accounts for driver slew rate differences between testers and due to changes that occur when the device load is imposed. The propagation delay time of the driver under load is subtracted from the overall propagation delay time of the device under test to achieve an adjusted propagation delay time for the device itself regardless of the driver or the load. Fig.

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Accurate Propagation Delay Time Measurement

Programmed tester comparator devices are utilized for testing integrated circuit elements and modules. One problem with testing is that the drive voltage response of the tester is a function of the load imposed by the device under test. Variations in driver delay are not accounted for in normal device waveform propagation delay time measurements performed in such testers. The present testing technique accounts for driver slew rate differences between testers and due to changes that occur when the device load is imposed. The propagation delay time of the driver under load is subtracted from the overall propagation delay time of the device under test to achieve an adjusted propagation delay time for the device itself regardless of the driver or the load. Fig. 1 illustrates the waveforms at the output of the programmable voltage driver and tester on line A. Starting from a time T0 at the left hand edge of Fig. 1 and ending at time Tf on the right hand edge of Fig. 1, the overall test cycle is as follows. At T0, the test driver is turned on, and two sets of program search strobe points are defined for the programmable tester. A Tfail and a Tpass time selected to bracket the expected driver response time are applied to the tester, as shown by the timing of line B in Fig. 1. When a nominal described effective drive voltage of approximately 1-1/2 volts is reached, the driver delay time is measured. In line C of Fig. 1, Tpass and Tfail times are identified for the tester to bracket the expected r...