Browse Prior Art Database

Sense System for Single-Ended Application in a Static Memory

IP.com Disclosure Number: IPCOM000061534D
Original Publication Date: 1986-Aug-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Loehlein, WD: AUTHOR [+2]

Abstract

The proposal concerns an approach which permits a small signal on a single-ended bit line to be very rapidly amplified. For that purpose, the bit line is charged to a potential VH-VTP which exactly matches the switching point of the bit line isolation device. The bit line is restored by a "self-timed" method such that restoring is initiated by the data output. Another characteristic is that a precharge signal invariably sets the sense amplifier to "0", thus conditioning it for switching. In multiport arrays, such as are frequently required for microprocessors, a cell must have several outputs. If double-ended bit lines were to be provided for each output, this would be highly space-consuming. To avoid this, single-ended outputs are used.

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Sense System for Single-Ended Application in a Static Memory

The proposal concerns an approach which permits a small signal on a single- ended bit line to be very rapidly amplified. For that purpose, the bit line is charged to a potential VH-VTP which exactly matches the switching point of the bit line isolation device. The bit line is restored by a "self-timed" method such that restoring is initiated by the data output. Another characteristic is that a precharge signal invariably sets the sense amplifier to "0", thus conditioning it for switching. In multiport arrays, such as are frequently required for microprocessors, a cell must have several outputs. If double-ended bit lines were to be provided for each output, this would be highly space-consuming. To avoid this, single-ended outputs are used. The proposal describes a highly sensitive sense amplifier, whose circuit and timing are shown in greater detail in Figs. 1 and 2, respectively. After array select, a precharge signal is activated at the start of a cycle, which erases the data of the preceding cycle (switching "1" to "0" and retaining "0"). During signal activation, the associated word line is decoded and selected. As a result, the cell value "1" causes a voltage drop of the bit line charged to VH-VTP (VTP being the threshold voltage of the P-device). In response to that voltage drop, transistor T4 starts charging node A. As soon as the voltage of node A is sufficiently high (T4 acting as a voltage ampl...