Browse Prior Art Database

On-Chip Electrically Programmable Fuse

IP.com Disclosure Number: IPCOM000061566D
Original Publication Date: 1986-Aug-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Craig, WJ: AUTHOR [+2]

Abstract

This article describes a high resistance on-chip programmable polysilicon fuse segment fabricated into a low sheet resistance silicide line which is used to interconnect semiconductor circuits. To blow fuses, on-chip electrical programming circuits are designed which produce high local heating by passing current through a highly resistive fuse link. Major circuit design criteria are the resistor value, the applied voltage pulses, device current and transistor size. The optimum design point is a high resistance fuse element which requires the minimum amount of current and smallest transistor size. Fig. 1 shows a vertical cross-section of a semiconductor structure with a layer of polysilicon on top which will form the basis for a silicide line to be selectively modified with a high resistance segment and form a fuse in the line.

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On-Chip Electrically Programmable Fuse

This article describes a high resistance on-chip programmable polysilicon fuse segment fabricated into a low sheet resistance silicide line which is used to interconnect semiconductor circuits. To blow fuses, on-chip electrical programming circuits are designed which produce high local heating by passing current through a highly resistive fuse link. Major circuit design criteria are the resistor value, the applied voltage pulses, device current and transistor size. The optimum design point is a high resistance fuse element which requires the minimum amount of current and smallest transistor size. Fig. 1 shows a vertical cross-section of a semiconductor structure with a layer of polysilicon on top which will form the basis for a silicide line to be selectively modified with a high resistance segment and form a fuse in the line. Silicides exhibit a low sheet resistance and are useful in the fabrication of conductors but are not suitable for high resistance fuses. It becomes possible through an additional masking step to integrate a high resistance polysilicon line segment into a low resistance silicide line. Fig. 2 shows a planar view of the additional mask step (FX) used to define a photoresist opening 10 in the fuse area of the polysilicon line 11. A lift-off process is used to leave silicon dioxide (SiO2) in the polysilicon line fuse opening 10. Fig. 1 shows a cross-section of the SiO2 placement on top of the polysilicon. F...